The invention relates to a method of manufacturing semiconductor devices whereby a pn junction extending parallel to main surfaces of a slice of semiconductor material is provided in said slice, after which depressions are provided in a main surface which cut through the pn junction, so that mutually insulated pn junctions are created, and the slice is split up into separate semiconductor bodies at the areas of some of said depressions, each body comprising a number of the pn junctions, while a layer of insulating material is provided on walls of the depressions. The invention also relates to a semiconductor device provided with a number of pn junctions separated each time by a depression.
The method serves to manufacture semiconductor devices which comprise bodies provided with a number of insulated pn junctions separated from one another by depressions. Semiconductor material below the depression forms an electrical connection between regions at one side of the pn junctions, so that these regions can be connected through one connection point. The regions at the other side of the pn junctions are separated from one another by the depressions. These regions can be connected each to a connection point which is separate for the relevant pn junction. Thus, for example, a number of diodes provided with a common anode or cathode, or a number of transistors, for example having a common collector or emitter, may be manufactured.
The slice of semiconductor material is provided with a doped surface zone in a usual manner, for example, by diffusion, which zone forms the pn junction with the material of the slice. The depressions may be provided in various ways, for example, in that a portion of a surface of the slice is covered and the uncovered portion is etched away, or in that grooves are sawn into the surface. Splitting-up of the slice of semiconductor material into separate semiconductor bodies takes place, for example, in that the slice is etched, sawn, or broken through. The depressions cut through the pn junction, so that the pn junction comes to the surface on walls of the depressions. An insulating layer, for example of glass or oxide, is accordingly provided on these walls, for example, by electrophoresis or chemical vapour deposition (CVD).
U.S. Pat. No. 3,699,402 discloses a method of the kind mentioned in the opening paragraph whereby depressions in the form of a system of parallel grooves are provided in each of two main surfaces of the slice of semiconductor material. The grooves in the one main surface have a longitudinal direction which is transverse to that in the other main surface. The slice is split up into separate semiconductor bodies in that the slice is separated at the area of each groove in the one main surface and at the area of every other groove in the other main surface. Separate semiconductor bodies comprising two diodes each are thus created. A layer of insulating material is finally provided on the walls of the grooves.
The known method described has the disadvantage that the provision of a layer of insulating material on the groove walls is difficult because it is provided after the slice has been split up into separate semiconductor bodies. The semiconductor bodies are then comparatively small and therefore difficult to handle. Since grooves are made in both main surfaces of the slice, in addition, the bodies must be provided with an insulating layer on both sides.